DVCon Expo: Exhibitors/Floorplan Atrenta Inc. Booth # 402
2077 Gateway Pl., Ste. 300 Atrenta is the leading provider of early design closure solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools & methodologies to optimize their designs early in the RTL phase for linting, Clock Domain Crossings (CDC), Power estimation and reduction, Design for Test (DFT), Constraints generation and validation including timing exceptions, and RTL prototyping. Atrenta optimized RTL delivers up to 30% efficiency gains in Chip integration, Implementation & Verification phases. Atrenta has over 130 customers, including the world's top 10 semiconductor companies. Think Early Design Closure! Think Atrenta! Tuesday, February 24, 2009 - 2:00 - 6:30pm (Bayshore Ballroom)  |
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