Session 2: Formal Verification Applications

Session Chair: Kenneth Chang - Cadence Design Systems, Inc.

2.1 Post-silicon Debug using Formal Verification Waypoints
C. Richard Ho, Michael Theobald, Brannon Batson, J.P. Grossman, Stanley C. Wang, Joseph Gagliardo, Martin M. Deneroff, Ron O. Dror - D. E. Shaw Research
David E. Shaw - D. E. Shaw Research and Columbia Univ.

2.2 A Novel Application of Formal Analysis to Verify LBIST
Syed Obaidulla, Samir Shah - Advanced Micro Devices, Inc.
Darrow Chu - Cadence Design Systems, Inc.

2.3 Beyond Assertions: Visualize Protocol Specifications using Assertions with a Formal Property Checker
Thomas J. Thatcher - Sun Microsystems, Inc.
Xiaolin Chen - Synopsys, Inc.