OneSpin Solutions Booth #502 Theresienhoehe 12 OneSpin Solutions will demonstrate a systematic formal verification approach that leverages timing diagrams to create properties that describe the intended behavior of multi-cycle, module-level operations – a design level familiar to testbench authors. The company’s TIming Diagram Assertion Library – TIDAL – eases and speeds the generation of such operation properties in SystemVerilog Assertion language. The resulting, compact, specification-compliant property set supports systematic, high-coverage verification using the company’s 360 Module Verifier – the industry’s first closed-loop formal verification solution. And you don’t have to be a formal expert to use it.
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