Mentor Graphics® is the industry's functional verification leader, providing best-in-class technologies and methodologies based on industry standards such as SystemVerilog and SystemC. The Mentor Graphics Questa™ advanced verification environment, combined with Mentor's 0-In® functional coverage tools, deliver the most comprehensive verification flow in the industry. The Mentor Graphics Advanced Verification Methodology (AVM) is the first, true, system-level-to-RTL verification methodology that enables leading-edge verification technologies to designs at multiple levels of abstraction, using multiple languages. The AVM provides libraries of base classes and modules in open-source and uses TLM interfaces as the communication mechanism between verification components. Mentor's portfolio of electronic system level (ESL) design technologies complement the AVM to enable hardware design and verification at a higher lever of abstraction. For more information, go to www.mentor.com.

Consultants' Corner
Gary Stringham & Associates, LLC
Sunburst Design, Inc.
Sutherland HDL, Inc.
XtremeEDA Corp.