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| Monday, March 1, 2004 |
1:00 PM - 5:00 PMPM
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| Presenters: Alan Fitch - Doulos Ltd., Ringwood, UK Stuart Swan - Cadence Design Systems, Inc., San Jose, CA Co-Author: John Aynsley - Doulos Ltd., Ringwood, UK This tutorial will introduce SystemC as a powerful language for advanced system design using Platform Transaction Level Modeling. It starts with an introduction to the background, history, and development of SystemC. Modeling styles will be introduced, with an emphasis on representing levels of abstraction. The SystemC Verification Library (SCV) extends SystemC to support a constrained random test methodology for verification in a C++ modelling environment. An introduction to constrained random testing is included, as well as an outline of the use of SCV. The tutorial concludes by describing how a complete verification flow is built up with SystemC for Platform Transaction Level Modeling, SCV for constrained random testing, and standardization of abstraction levels to simplify refinement from high to low level.
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