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| Monday, March 1, 2004 |
8:00 AM - 12:00 PM
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| Presenter: Jason Andrews - Axis Systems, Inc., Sunnyvale, CA
SoC verification requires a mix of expertise from the disciplines of microprocessor and computer architecture, logic design, and embedded software. This paper provides in depth information about logic simulation, simulation acceleration, in-circuit emulation, HW/SW co-verification, assertions, and testbenches for SoC designs. The paper presents important information about verifying SoC designs using ARM microprocessor cores. In the last few years ARM has achieved a dominant market position in the 32-bit embedded microprocessor space. This paper illustrates verification concepts using ARM SoC examples and provides tutorial information about ARM microprocessors and how they operate. Attendees should have some knowledge of embedded system design including microprocessors and software. Those with a hardware engineering background should be familiar with digital logic design and verification. A working knowledge of Verilog or VHDL is assumed as well as familiarity with common simulation tools. Those with a software background should be proficient in C and assembly language programming and should be familiar with embedded system concepts. Specific experience with the ARM architecture is useful, but not required.
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