![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
HDLCon 2001 Technical Program
![]()
|
Session 3 SoC Design and Reconfigurable Computing
|
|||
| Chair: George Bakewell - Novas Software, Inc. |
Room: Salon C
|
||
|
|
|
||
| 3.1 | Wild Blue Yonder: Experiences in Designing an FPGA with State Machines for a Modern Fighter Jet, using VHDL and DesignBook Brian L Snyder - BF Goodrich Aerospace, Inc. |
3.4 | Design Reuse: Not Just for ASICs Carol Fields - Xilinx, Inc. |
| 3.2 | SoC Simulation: the Problem of Integration Santiago Fernández-Gómez, Edgar L. Torres-Silva - ATI Research Silicon Valley, Inc. |
3.5 | Techniques for Rapid Implementation of High Performance FPGAs from Algorithmic C Specifications Shiv Prakash, Andrew Guyler, Simon J. Waters - Exemplar Logic Inc. |
| 3.3 | Team-based FPGA Design Paul Ree - Mentor Graphics Corp. |
3.6 | IP and Design Reuse for Programmable Logic Ananda S. Arasu - Mentor Graphics Corp. |