HDLCon 2001 Technical Program

Thursday Sessions

Friday Sessions

Tutorials

Keynote Addresses

8:30 am - 9:45 am	Session 5 Modeling and Verification Techniques Using C and C++	Session 6 Exploring Other Possibilities in HDL-Based Design
9:45 am - 10:15 am	Break
10:15 am - 11:30 am	Session 5 (cont.) Modeling and Verification Techniques Using C and C++	Session 6 (cont.) Exploring Other Possibilities in HDL-Based Design
11:30 am - 12:00 pm	Break
12:00 pm - 1:45 pm	Keynote Lunch Panel Design Verification Languages : Are We heading in the Right Direction?
1:45 pm - 2:00 pm	Best Paper Awards
2:00 pm - 2:30 pm	Break
2:30 pm - 3:30 pm	Panel 1 Mixed Signal Design: Putting it All Together	Panel 2 Language Interoperability for Hardware/Software System Design