![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
|
|
|
|
|
|
|
![]()
|
DS Diagonal Systems AG
Tumigerstrasse 71 CH-8606 Greifensee Switzerland (41) 1-905-6060 www.diagonal.com |
| Come and see how Diagonal's BestBench automates the design and debug of self-checking HDL testbenches. With BestBench you just specify in Verilog or VHDL the sequence of transactions of stimuli alongside the expected responses and you get a self-checking testbench ready for interactive circuit debug or regression testing. You can also reuse our "starter kits" for PCI, ATM-Utopia, ARM-Amba,? to speed-up your overall verification process. |