![]() |
![]() |
![]() |
![]() |
![]() |
![]() |
|
|
|
|
|
|
|
![]()
|
Co-Design Automation, Inc.
4984 El Camino Real, Ste. 220 Los Altos, CA 94022 (877) 626-3374 www.co-design.com |
| Designed by Peter Flake (HILO) and Phil Moorby (Verilog), the "SUPERLOG" language is based on Verilog and uses C together with unique capabilities to target design and verification, enabling a productive, evolutionary approach for Verilog users. The SYSTEMSIM simulator enables an integrated, easy to use verification environment with fast no-PLI C access, and SYSTEMEX provides abstract SUPERLOG synthesis. |